1. Field of the Invention
The present invention relates to data processing systems, and more particularly to apparatus for the conversion of floating point numbers to integers for the conversion of integers to floating point numbers in the floating-point unit of a microprocessor.
2. Description of the Related Art
U.S. Pat. No. 4,823,260 of Imel et al. describes a microprocessor and a floating-point unit in the processor that implements the IEEE microprocessor floating-point standard P754. Extended-precision floating-point calculations are performed by using 32-bit, 64-bit, and 80-bit real values.
The above-cited patent reduced the number of floating-point operations, and simplified the programming, thereby increasing the performance of the floating-point operations by providing an apparatus for performing a number of kinds of mixed-precision calculations utilizing a single-instruction op code. The advantage is that mixed-precision arithmetic is supported as well as extended-precision arithmetic. Mixed-precision arithmetic avoids extra conversion instructions, allows computation of the result to sufficient precision instead of the widest precision and does not occur double-rounding in the arithmetic operation if the intermediate result is rounded to extended precision first. It is desirable to speed up the conversion process and to reduce the logic.
It is an object of the present invention to provide a floating-point-unit in which floating-point to integer and integer to floating point conversions are done in three clock cycles.